NAAC-Accredited 'A++' - Grade 2(f) & 12(B) status (UGC) |ISO
9001:2015 Certified | FIST Funded (DST) SIRO(DSIR)
UG
PG - VLSI Design
PG - Communication Systems
Project Details: 2022 - 2023 (M.E. VLSI Design)
| S.No | Project Student Name | Project Guide | Project title |
|---|---|---|---|
| 1. | Harish kumar A | Dr. K. R. Kavitha | Design and Implementation of 3T based XOR/XNOR Logic Gate for High Power Gain and Less Propagation Delay |
| 2. | Jawahar K | Dr. G. Ravi | Design of Low Power and Area Efficient ALU using M-GDI Technique and Decoder |
| 3. | Santhosh M | Prof. J. Harirajkumar | Design and Implementation of AN SPI to I2C Bridge for Seamless Communication and Interoperability between Devices. |
| 4. | Swetha S | Prof. J. Harirajkumar | Design of Efficient Pipelined Parallel Prefix Lander Fischer based on Carry Select Adder |